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| (R) ISL28236 Data Sheet June 18, 2009 FN6921.0 5MHz, Dual Precision Rail-to-Rail Input-Output (RRIO) Op Amp The ISL28236 is a low-power dual operational amplifier optimized for single supply operation from 2.4V to 5.5V, allowing operation from one lithium cell or two Ni-Cd batteries. The device features a gain-bandwidth product of 5MHz. The ISL28236 features an Input Range Enhancement Circuit (IREC), which enables the amplifier to maintain CMRR performance for input voltages greater than the positive supply. The input signal is capable of swinging 0.25V above the positive supply and to the negative supply with only a slight degradation of the CMRR performance. The output operation is rail-to-rail. The part typically draw less than 1mA supply current per amplifier while meeting excellent DC accuracy, AC performance, noise and output drive specifications. Operation is guaranteed over -40C to +125C temperature range. Features * 5MHz Gain Bandwidth Product @ AV = 100 * 2mA Typical Supply Current * 240V Maximum Offset Voltage * 6nA Typical Input Bias Current * Down to 2.4V Single Supply Voltage Range * Rail-to-rail Input and Output * -40C to +125C Operation * Pb-Free (RoHS compliant) Applications * Low-end Audio * 4mA to 20mA Current Loops * Medical Devices * Sensor Amplifiers * ADC Buffers Ordering Information PART NUMBER (Note) ISL28236FBZ ISL28236FBZ-T7* Coming Soon ISL28236FUZ Coming Soon ISL28236FUZ-T7* PART MARKING 28236 FBZ 28236 FBZ 8236Z 8236Z PACKAGE (Pb-Free) 8 Ld SOIC 8 Ld SOIC 8 Ld MSOP 8 Ld MSOP PKG. DWG. # MDP0027 MDP0027 MDP0043 * DAC Output Amplifiers Pinouts ISL28236 (8 LD SOIC) TOP VIEW OUT_A 1 IN-_A 2 -+ +8 V+ 7 OUT_B 6 IN-_B 5 IN+_B OUT_A 1 IN-_A 2 IN+_A 3 V- 4 -+ +- ISL28236 (8 LD MSOP) TOP VIEW 8 V+ 7 OUT_B 6 IN-_B 5 IN+_B MDP0043 IN+_A 3 V- 4 *Please refer to TB347 for details on reel specifications. NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright (c) Intersil Americas Inc. 2009. All Rights Reserved. All other trademarks mentioned are the property of their respective owners. ISL28236 Absolute Maximum Ratings (TA = +25C) Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.75V Supply Turn-on Voltage Slew Rate . . . . . . . . . . . . . . . . . . . . . 1V/s Differential Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . V- - 0.5V to V+ + 0.5V ESD Rating Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3kV Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .300V Thermal Information Thermal Resistance (Typical, Note 1) JA (C/W) 8 Ld SO Package . . . . . . . . . . . . . . . . . . . . . . . . . . 120 8 Ld MSOP Package . . . . . . . . . . . . . . . . . . . . . . . . 160 Storage Temperature Range . . . . . . . . . . . . . . . . . .-65C to +150C Pb-free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp Operating Conditions Ambient Temperature Range. . . . . . . . . . . . . . . . . .-40C to +125C Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +125C CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTE: 1. JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA Electrical Specifications V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open, TA = +25C unless otherwise specified. Boldface limits apply over the operating temperature range, -40C to +125C. Temperature data established by characterization. DESCRIPTION CONDITIONS MIN (Note 2) TYP MAX (Note 2) UNIT PARAMETER DC SPECIFICATIONS VOS V OS --------------T IOS IB VCM CMRR PSRR AVOL Input Offset Voltage Input Offset Voltage vs Temperature Input Offset Current 8 Ld SOIC -240 -250 20 0.4 240 250 V V/C TA = -40C to +125C Input Bias Current TA = -40C to +125C Common-Mode Voltage Range Common-Mode Rejection Ratio Power Supply Rejection Ratio Large Signal Voltage Gain Guaranteed by CMRR VCM = 0V to 5V V+ = 2.4V to 5.5V VO = 0.5V to 4V, RL = 100k to VCM VO = 0.5V to 4V, RL = 1k to VCM VOUT Maximum Output Voltage Swing Output low, RL = 100k to VCM Output low, RL = 1k to VCM Output high, RL = 100k to VCM Output high, RL = 1k to VCM IS Supply Current -10 -30 -40 -50 0 90 90 90 90 600 500 2 6 10 30 40 50 5 nA nA V dB dB V/mV V/mV 115 100 1600 100 1 47 10 10 70 90 mV mV V V 4.99 4.99 4.93 4.91 4.997 4.952 2 2.5 2.6 mA 2 FN6921.0 June 18, 2009 ISL28236 Electrical Specifications V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open, TA = +25C unless otherwise specified. Boldface limits apply over the operating temperature range, -40C to +125C. Temperature data established by characterization. (Continued) DESCRIPTION Short-Circuit Output Source Current Short-Circuit Output Sink Current Supply Operating Range CONDITIONS RL = 10 to VCM RL = 10 to VCM V+ to VMIN (Note 2) 50 40 50 40 2.4 TYP 70 70 5.5 MAX (Note 2) UNIT mA mA V PARAMETER IO+ IOVSUPPLY AC SPECIFICATIONS GBW eN Gain Bandwidth Product Input Noise Voltage Peak-to-Peak Input Noise Voltage Density iN CMRR at 120Hz PSRR+ at 120Hz PSRRat 120Hz Crosstalk at 10kHz Input Noise Current Density Input Common Mode Rejection Ratio Power Supply Rejection Ratio (V+) Power Supply Rejection Ratio (V-) Channel A to Channel B AV = 100, RF = 100k, RG = RL = 10k to VCM f = 0.1Hz to 10Hz, RL = 10k to VCM fO = 1kHz, RL = 10k to VCM fO = 10kHz, RL = 10k to VCM VCM = 0.1VP-P, RL = 10k to VCM V+, V- = 1.2V and 2.5V, VSOURCE = 0.1VP-P, RL = 10k to VCM V+, V- = 1.2V and 2.5V VSOURCE = 0.1VP-P, RL = 10k to VCM V+, V- = 2.5V; AV = 1 VSOURCE = 0.4VP-P, RL = 10k to VCM 5 0.4 15 0.35 90 88 105 140 MHz VP-P nV/Hz pA/Hz dB dB dB dB TRANSIENT RESPONSE SR tr, tf, Large Signal tr, tf, Small Signal Slew Rate Rise Time, 10% to 90%, VOUT Fall Time, 90% to 10%, VOUT Rise Time, 10% to 90%, VOUT Fall Time, 90% to 10%, VOUT ts, NOTE: 2. Parameters with MIN and/or MAX limits are 100% tested at +25C, unless otherwise specified. Temperature limits established by characterization and are not production tested. Settling Time to 0.01%; 4V Step VOUT = 1.5V; Rf = 50k, RG = 50k to VCM AV = -1, VOUT = 4VP-P, RL = 10k to VCM AV = -1, VOUT = 4VP-P, RL = 10k to VCM AV = +1, VOUT = 100mVP-P, RL = 10k to VCM AV = +1 VOUT = 100mVP-P, RL = 10k to VCM VOUT = 4VP-P; RL = 10k to VCM 1.8 2.1 2 60 50 5.1 V/s s s ns ns s 3 FN6921.0 June 18, 2009 ISL28236 Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open 100 80 60 40 VOS (V) 20 0 -20 -40 -60 -80 -100 -1 0 1 2 3 VCM (V) 4 5 6 V+ = 5V RL = OPEN Rf = 100k, Rg = 100 AV = +1000 GAIN (dB) 10 8 6 4 2 0 -2 -4 -6 -8 VS = 5V CL = 4pF AV = +2 VOUT = 10mVP-P 1k 10k 100k 1M 10M 100M Rf = Ri = 10k Rf = Ri = 1k Rf = Ri = 100k -10 100 FREQUENCY (Hz) FIGURE 1. INPUT OFFSET VOLTAGE vs COMMON-MODE INPUT VOLTAGE FIGURE 2. GAIN vs FREQUENCY vs FEEDBACK RESISTOR VALUES Rf/Rg 1 0 NORMALIZED GAIN (dB) -1 -2 -3 -4 -5 -6 VS = 5V RL = 10k -7 CL = 4pF -8 A = +1 V -9 10k VOUT = 100mV VOUT = 10mV VOUT = 50mV VOUT = 1V NORMALIZED GAIN (dB) 1 0 -1 -2 -3 -4 -5 -6 V+ = 5V CL = 4pF -7 AV = +1 -8 V OUT = 10mVP-P -9 10k 100k RL = 1k RL = 100k RL = 10k 100k 1M FREQUENCY (Hz) 10M 100M 1M FREQUENCY (Hz) 10M 100M FIGURE 3. GAIN vs FREQUENCY vs VOUT, RL = 10k FIGURE 4. GAIN vs FREQUENCY vs RL 70 60 50 GAIN (dB) 40 30 20 10 0 AV = 1 AV = 1, Rg = INF, Rf = 0 1k 10k 100k 1M FREQUENCY (Hz) 10M 100M AV = 10 AV = 10, Rg = 1k, Rf = 9.09k AV = 101 AV = 101, Rg = 1k, Rf = 100k V+ = 5V CL = 16.3pF RL = 10k VOUT = 10mVP-P AV = 1001 AV = 1001, Rg = 1k, Rf = 1M NORMALIZED GAIN (dB) 1 0 -1 -2 -3 -4 -5 -6 RL = 10k CL = 4pF -7 AV = +1 -8 V OUT = 10mVP-P -9 10k 100k VS = 5V VS = 2.4V -10 100 1M FREQUENCY (Hz) 10M 100M FIGURE 5. FREQUENCY RESPONSE vs CLOSED LOOP GAIN FIGURE 6. GAIN vs FREQUENCY vs SUPPLY VOLTAGE 4 FN6921.0 June 18, 2009 ISL28236 Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open (Continued) 8 7 6 5 4 3 2 1 0 -1 -2 -3 V = 5V S -4 R = 10k -5 L -6 AV = +1 -7 VOUT = 10mVP-P -8 10k 100k 120 CL = 37pF CL = 26pF CMRR (dB) 100 80 VS = 2.4V 60 40 20 0 -20 0.1 RL = 10k CL = 4pF AV = +1 VCM = 100mVP-P 1 10 100 1k 10k 100k 1M 10M VS = 5V NORMALIZED GAIN (dB) CL = 16pF CL = 4pF 1M FREQUENCY (Hz) 10M 100M FREQUENCY (Hz) FIGURE 7. GAIN vs FREQUENCY vs CL FIGURE 8. CMRR vs FREQUENCY; V+ = 2.4V AND 5V 120 100 80 PSRR (dB) 60 PSRR40 20 0 -20 0.1 V+, V- = 1.2V RL = 10k CL = 4pF AV = +1 VSOURCE = 100mVP-P 1 10 100 1k 10k 100k 1M 10M PSRR+ PSRR (dB) 120 100 PSRR+ 80 60 PSRR40 20 0 -20 0.1 V+, V- = 2.5V RL = 10k CL = 4pF AV = +1 VSOURCE = 100mVP-P 1 10 100 1k 10k FREQUENCY (Hz) 100k 1M 10M FREQUENCY (Hz) FIGURE 9. PSRR vs FREQUENCY, V+, V- = 1.2V FIGURE 10. PSRR vs FREQUENCY, V+, V- = 2.5V 160 140 CROSSTALK (dB) 120 100 80 60 40 20 0 10 V+, V- = 2.5V RL = OPEN TRANSMIT CHANNEL RL = 10k RECEIVING CHANNEL CL = 4pF AV = +1 VSOURCE = 400mVP-P 100 1k 10k 100k 1M FREQUENCY (Hz) 10M 100M INPUT NOISE VOLTAGE (nVHz) 100 V+ = 5V RL = 1k CL = 16.3pF AV = +1 10 1 10 100 1k FREQUENCY (Hz) 10k 100k FIGURE 11. CROSSTALK vs FREQUENCY, V+, V- = 2.5V FIGURE 12. INPUT NOISE VOLTAGE DENSITY vs FREQUENCY 5 FN6921.0 June 18, 2009 ISL28236 Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open (Continued) 10 INPUT CURRENT NOISE (pAHz) V+ = 5V RL = 1k CL = 16.3pF AV = +1 1 0.5 0.4 0.3 INPUT NOISE (V) 0.2 0.1 0 -0.1 -0.2 -0.3 -0.4 0.1 1 10 100 1k FREQUENCY (Hz) 10k 100k -0.5 0 1 2 3 4 5 6 7 8 9 10 V+ = 5V RL = 10k CL = 16.3pF Rg = 10, Rf = 100k AV = 10000 TIME (s) FIGURE 13. INPUT CURRENT NOISE DENSITY vs FREQUENCY FIGURE 14. INPUT NOISE VOLTAGE 0.1Hz TO 10Hz 2.5 2.0 1.5 LARGE SIGNAL (V) 1.0 0.5 0 -0.5 -1.0 -1.5 -2.0 -2.5 0 10 20 30 40 50 TIME (s) 60 70 80 V+, V- = 2.5V RL = 1k and 10k CL = 4pF AV = 2 VOUT = 4VP-P SMALL SIGNAL (V) 60 50 40 30 20 10 0 -10 -20 -30 -40 -50 -60 V+, V- = 1.2V AND 2.5V RL = 1k and 10k CL = 4pF AV = 1 VOUT = 100mVP-P 0 0.1 0.2 0.3 0.4 0.5 0.6 TIME (s) 0.7 0.8 0.9 1.0 FIGURE 15. LARGE SIGNAL STEP RESPONSE FIGURE 16. SMALL SIGNAL STEP RESPONSE 2.6 2.4 VS = 2.875V 2.2 CURRENT (mA) 2 VS = 2.5V 1.8 1.6 VS = 1.5V 1.4 -2.3 1.2 1 -40 -20 0 20 40 60 80 100 120 -2.5 -40 -20 0 MIN 20 40 60 80 100 120 CURRENT (mA) -1.7 -1.9 MEDIAN -2.1 -1.5 MAX TEMPERATURE (C) TEMPERATURE (C) FIGURE 17. SUPPLY CURRENT vs TEMPERATURE vs SUPPLY VOLTAGE FIGURE 18. NEGATIVE SUPPLY CURRENT vs TEMPERATURE, V+, V- = 2.5V 6 FN6921.0 June 18, 2009 ISL28236 Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open (Continued) 200 150 100 MAX 200 150 MAX 100 VOS (V) 50 0 -50 VOS (V) MEDIAN 50 MEDIAN 0 -50 -100 -150 -40 MIN -100 -150 -40 MIN -20 0 20 40 60 80 100 120 -20 0 20 40 60 80 100 120 TEMPERATURE (C) TEMPERATURE (C) FIGURE 19. VOS vs TEMPERATURE, V+, V- = 1.2V, FIGURE 20. VOS vs TEMPERATURE, V+, V- = 2.5V, 15 10 MAX 5 IBIAS+ (nA) 0 IBIAS- (nA) -5 -10 -15 -20 -25 -30 -40 -20 0 20 40 60 80 TEMPERATURE (C) 100 120 MIN MEDIAN 15 10 5 0 -5 -10 -15 -20 -25 -30 -40 -20 0 20 40 60 80 100 120 MIN MEDIAN MAX TEMPERATURE (C) FIGURE 21. IBIAS+ vs TEMPERATURE, V+, V- = 2.5V FIGURE 22. IBIAS- vs TEMPERATURE, V+, V- = 2.5V 30 25 MAX 20 IBIAS- (nA) IBIAS- (nA) 15 10 5 0 -5 -10 -40 -20 0 20 40 60 80 100 120 MIN MEDIAN 30 25 MAX 20 15 10 5 0 -5 -10 -40 -20 0 20 40 60 80 100 120 MIN MEDIAN TEMPERATURE (C) TEMPERATURE (C) FIGURE 23. IBIAS+ vs TEMPERATURE, V+, V- = 1.2V FIGURE 24. IBIAS- vs TEMPERATURE, V+, V- = 1.2V 7 FN6921.0 June 18, 2009 ISL28236 Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open (Continued) 12 10 8 6 4 IOS (nA) 2 0 -2 -4 -6 -8 -10 -40 -20 0 20 40 60 80 TEMPERATURE (C) MIN IOS (nA) MEDIAN MAX 12 10 8 6 4 2 0 -2 -4 -6 -8 120 -10 -40 -20 0 20 40 60 80 TEMPERATURE (C) MIN MEDIAN MAX 100 100 120 FIGURE 25. IOS vs TEMPERATURE, V+, V- = 2.5V FIGURE 26. IOS vs TEMPERATURE, V+, V- = 1.2V 170 160 150 CMRR (dB) PSRR (dB) 140 130 120 110 MIN 100 90 -40 -20 0 20 40 60 80 100 120 MEDIAN MAX 160 150 140 130 MAX 120 110 100 90 -40 -20 0 20 MEDIAN MIN 40 60 80 100 120 TEMPERATURE (C) TEMPERATURE (C) FIGURE 27. CMRR vs TEMPERATURE, V+, V- = 2.5V FIGURE 28. PSRR vs TEMPERATURE, V+, V- = 1.2V 4060 3560 3060 AVOL (V/mV) 2560 2060 MEDIAN 1560 1060 560 60 -40 -20 0 20 40 60 80 100 120 MIN MAX AVOL (V/mV) 220 200 MAX 180 160 140 MEDIAN 120 MIN 100 80 60 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (C) TEMPERATURE (C) FIGURE 29. AVOL vs TEMPERATURE, V+, V- = 2.5V, VO = -2V TO +2V, RL = 100k FIGURE 30. AVOL vs TEMPERATURE, V+, V- = 2.5V, VO = -2V TO +2V, RL = 1k 8 FN6921.0 June 18, 2009 ISL28236 Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open (Continued) 4.965 4.960 MAX VOUT (V) VOUT (mV) 4.955 MEDIAN 4.950 4.945 MIN 4.940 4.935 -40 70 65 60 55 50 MIN 45 40 35 -40 MEDIAN MAX -20 0 20 40 60 80 TEMPERATURE (C) 100 120 -20 0 20 40 60 80 TEMPERATURE (C) 100 120 FIGURE 31. VOUT HIGH vs TEMPERATURE, V+, V- = 2.5V, RL = 1k FIGURE 32. VOUT LOW vs TEMPERATURE, V+, V- = 2.5V, RL = 1k 4.9985 4.9980 MAX VOUT (V) VOUT (mV) 4.9975 4.9970 4.9965 4.9960 4.9955 -40 1.75 1.55 MAX 1.35 1.15 0.95 0.75 0.55 0.35 -40 MEDIAN MIN MIN MEDIAN -20 0 20 40 60 80 TEMPERATURE (C) 100 120 -20 0 20 40 60 80 TEMPERATURE (C) 100 120 FIGURE 33. VOUT HIGH vs TEMPERATURE, V+, V- = 2.5V, RL = 100k FIGURE 34. VOUT LOW vs TEMPERATURE, V+, V- = 2.5V, RL = 100k 2.9 2.7 SLEW RATE RISE (V/uS) MAX 2.5 2.3 2.1 1.9 1.7 MIN 1.5 1.3 -40 -20 0 20 40 60 80 100 120 MEDIAN TEMPERATURE (C) FIGURE 35. SLEW RATE RISE vs TEMPERATURE, VOUT = 1.5V, VP-PV+, V- = 2.5V, RL = 100k 9 FN6921.0 June 18, 2009 ISL28236 Pin Descriptions ISL28236 (8 Ld SOIC) (8 Ld MSOP) 2 (A) 6 (B) PIN NAME ININ-_A IN-_B FUNCTION inverting input EQUIVALENT CIRCUIT V+ IN- IN+ VCircuit 1 3 (A) 5 (B) 4 IN+ IN+_A IN+_B V- Non-inverting input See Circuit 1 Negative supply V+ CAPACITIVELY COUPLED ESD CLAMP VCircuit 2 1 (A) 7 (B) OUT OUT_A OUT_B Output V+ OUT VCircuit 3 8 V+ Positive supply See Circuit 2 Applications Information Introduction The ISL28236 is a dual channel Bi-CMOS rail-to-rail input, output (RRIO) micropower precision operational amplifier. The part is designed to operate from single supply (2.4V to 5.5V) or dual supply (1.2V to 2.75V). The ISL28236 has an input common mode range that extends 0.25V above the positive rail and down to the negative supply rail. The output operation can swing within about 3mV of the supply rails with a 100k load. rail. The input offset voltage exhibits a smooth behavior throughout the extended common-mode input range. The input bias current versus the common-mode voltage range gives an undistorted behavior from the negative rail to 0.25V higher than the positive rail. Power Supply Decoupling The internal charge pump operates at approximately 27MHz and oscillator ripple doesn't show up in the 5MHz bandwidth of the amplifier. Good power supply decoupling with 0.01F capacitors at each device power supply pin, is the most effective way to reduce oscillator ripple at the amplifier output. Figure 36 shows the electrical connection of these capacitors using split power supplies. For single supply operation with V- tied to a ground plane, only a single 0.01F capacitor from V+ is needed. When multiple ISL28236 op amps are used on a single PC board, each op amp will require a 0.01F decoupling capacitor at each supply pin Rail-to-Rail Input Many rail-to-rail input stages use two differential input pairs, a long-tail PNP (or PFET) and an NPN (or NFET). Severe penalties have to be paid for this circuit topology. As the input signal moves from one supply rail to another, the operational amplifier switches from one input pair to the other. Thus causing drastic changes in input offset voltage and an undesired change in magnitude and polarity of input offset current. The ISL28236 solves this problem using an internal charge-pump to provide a voltage boost to the V+ supply rail driving the input differential pair. This results in extending the input common voltage rails to 0.25V beyond the V+ positive Rail-to-Rail Output The rail-rail output stage uses CMOS devices that typically swing to within 3mV of the supply rails with a 100k load. The NMOS sinks current to swing the output in the negative direction. The PMOS sources current to swing the output in the positive direction. 10 FN6921.0 June 18, 2009 ISL28236 Current Limiting These devices have no internal current-limiting circuitry. If the output is shorted, it is possible to exceed the Absolute Maximum Rating for output current or power dissipation, potentially resulting in the destruction of the device. Amp applications are similar, except that the active channel VOUT determines the voltage on the IN- terminal. 3. When the slew rate of the input pulse is considerably faster than the op amp's slew rate. If the VOUT can't keep up with the IN+ signal, a differential voltage results, and visible distortion occurs on the input and output signals. To avoid this issue, keep the input slew rate below 1.9V/s, or use appropriate current limiting resistors. Large (>2V) differential input voltages can also cause an increase in disabled ICC. Results of Overdriving the Output Caution should be used when overdriving the output for long periods of time. Overdriving the output can occur in two ways. 1. The input voltage times the gain of the amplifier exceeds the supply voltage by a large value or, 2. The output current required is higher than the output stage can deliver. These conditions can result in a shift in the Input Offset Voltage (VOS) (as much as 1V/hr. of exposure under these conditions). Using Only One Channel If the application only requires one channel, the user must configure the unused channel to prevent it from oscillating. The unused channel will oscillate if the input and output pins are floating. This will result in higher than expected supply currents and possible noise injection into the channel being used. The proper way to prevent this oscillation is to short the output to the negative input and ground the positive input (as shown in Figure 37). + IN+ and IN- Input Protection All input terminals have internal ESD protection diodes to both positive and negative supply rails, limiting the input voltage to within one diode beyond the supply rails. They also contain back-to-back diodes across the input terminals (see "Pin Descriptions" on page 10 - Circuit 1). For applications where the input differential voltage is expected to exceed 0.5V, an external series resistor must be used to ensure the input currents never exceed 5mA (Figure 36). V+ 0.01F VIN RIN + RL 0.01F VVOUT DECOUPLING CAPACITORS FIGURE 37. PREVENTING OSCILLATIONS IN UNUSED CHANNELS Power Dissipation It is possible to exceed the +125C maximum junction temperatures under certain load and power supply conditions. It is therefore important to calculate the maximum junction temperature (TJMAX) for all applications to determine if power supply voltages, load conditions, or package type need to be modified to remain in the safe operating area. These parameters are related in Equation 1: T JMAX = T MAX + ( JA xPD MAXTOTAL ) (EQ. 1) FIGURE 36. LOCAL POWER SUPPLY DECOUPLING AND INPUT CURRENT LIMITING where: * PDMAXTOTAL is the sum of the maximum power dissipation of each amplifier in the package (PDMAX) * PDMAX for each amplifier can be calculated using Equation 2: V OUTMAX PD MAX = V S x I SMAX + ( V S - V OUTMAX ) x --------------------------R L Limitations of the Differential Input Protection If the input differential voltage is expected to exceed 0.5V, an external current limiting resistor must be used to ensure the input current never exceeds 5mA. For non-inverting unity gain applications, the current limiting can be via a series IN+ resistor, or via a feedback resistor of appropriate value. For other gain configurations, the series IN+ resistor is the best choice, unless the feedback (RF) and gain setting (RG) resistors are both sufficiently large to limit the input current to 5mA. Large differential input voltages can arise from several sources: 1. During open loop (comparator) operation. Used this way, the IN+ and IN- voltages don't track, so differentials arise. 2. When the amplifier is disabled but an input signal is still present. An RL or RG to GND keeps the IN- at GND, while the varying IN+ signal creates a differential voltage. Mux (EQ. 2) where: * TMAX = Maximum ambient temperature * JA = Thermal resistance of the package * PDMAX = Maximum power dissipation of 1 amplifier * VS = Total supply voltage * IMAX = Maximum supply current of 1 amplifier * VOUTMAX = Maximum output voltage swing of the application * RL = Load resistance FN6921.0 June 18, 2009 11 ISL28236 Small Outline Package Family (SO) A D N (N/2)+1 h X 45 A E E1 PIN #1 I.D. MARK c SEE DETAIL "X" 1 B (N/2) L1 0.010 M C A B e C H A2 GAUGE PLANE A1 0.004 C 0.010 M C A B b DETAIL X SEATING PLANE L 4 4 0.010 MDP0027 SMALL OUTLINE PACKAGE FAMILY (SO) INCHES SYMBOL A A1 A2 b c D E E1 e L L1 h N NOTES: 1. Plastic or metal protrusions of 0.006" maximum per side are not included. 2. Plastic interlead protrusions of 0.010" maximum per side are not included. 3. Dimensions "D" and "E1" are measured at Datum Plane "H". 4. Dimensioning and tolerancing per ASME Y14.5M-1994 SO-8 0.068 0.006 0.057 0.017 0.009 0.193 0.236 0.154 0.050 0.025 0.041 0.013 8 SO-14 0.068 0.006 0.057 0.017 0.009 0.341 0.236 0.154 0.050 0.025 0.041 0.013 14 SO16 (0.150") 0.068 0.006 0.057 0.017 0.009 0.390 0.236 0.154 0.050 0.025 0.041 0.013 16 SO16 (0.300") (SOL-16) 0.104 0.007 0.092 0.017 0.011 0.406 0.406 0.295 0.050 0.030 0.056 0.020 16 SO20 (SOL-20) 0.104 0.007 0.092 0.017 0.011 0.504 0.406 0.295 0.050 0.030 0.056 0.020 20 SO24 (SOL-24) 0.104 0.007 0.092 0.017 0.011 0.606 0.406 0.295 0.050 0.030 0.056 0.020 24 SO28 (SOL-28) 0.104 0.007 0.092 0.017 0.011 0.704 0.406 0.295 0.050 0.030 0.056 0.020 28 TOLERANCE MAX 0.003 0.002 0.003 0.001 0.004 0.008 0.004 Basic 0.009 Basic Reference Reference NOTES 1, 3 2, 3 Rev. M 2/07 12 FN6921.0 June 18, 2009 ISL28236 Mini SO Package Family (MSOP) 0.25 M C A B D N A (N/2)+1 MDP0043 MINI SO PACKAGE FAMILY MILLIMETERS SYMBOL A A1 MSOP8 1.10 0.10 0.86 0.33 0.18 3.00 4.90 3.00 0.65 0.55 0.95 8 MSOP10 1.10 0.10 0.86 0.23 0.18 3.00 4.90 3.00 0.50 0.55 0.95 10 TOLERANCE Max. 0.05 0.09 +0.07/-0.08 0.05 0.10 0.15 0.10 Basic 0.15 Basic Reference NOTES 1, 3 2, 3 Rev. D 2/07 NOTES: 1. Plastic or metal protrusions of 0.15mm maximum per side are not included. E E1 PIN #1 I.D. A2 b c B 1 (N/2) D E E1 e C SEATING PLANE 0.10 C N LEADS b H e L L1 N 0.08 M C A B L1 A c SEE DETAIL "X" 2. Plastic interlead protrusions of 0.25mm maximum per side are not included. 3. Dimensions "D" and "E1" are measured at Datum Plane "H". 4. Dimensioning and tolerancing per ASME Y14.5M-1994. A2 GAUGE PLANE L DETAIL X 0.25 A1 3 3 All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 13 FN6921.0 June 18, 2009 |
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